• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    Provided is a low noise infrared photodetector having a vertically integrated field effect transistor (FET) structure formed without thermal diffusion. The FET structure includes a high sensitivity photodetector layer, a charge sink layer, a transfer sink layer, a charge transfer gate, and a drain electrode. In one embodiment, the photodetector layer and the charge sink are InGaAs and the other layers are InP layers.
    公开号:BE1021287B1
    申请号:E2014/0176
    申请日:2014-03-14
    公开日:2015-10-20
    发明作者:Peter E. Dixon
    申请人:Sensors Unlimited Inc.；
    IPC主号:
    专利说明:

    EPITAXIAL STRUCTURE FOR VERTICALLY INTEGRATED LOAD TRANSFER GRID TECHNOLOGY IN OPTOELECTRONIC MATERIALS
    BACKGROUND
    The present invention generally relates to a radiation detection device in the near-infrared spectrum. In particular, the invention relates to a low noise IR detector without thermal diffusion.
    [0002] Modern infrared (IR) imaging systems may be focal plane arrays of detectors and associated integrated circuits in each pixel which transforms the collected signals into visual means or other analyzable means. Near-IR detection systems that operate in the 1 to 1.7 μm wavelength region are sometimes associated with visible detection systems that operate in the wavelength range of 400 to 700 nm. improve detection and visualization in low light and twilight scenarios. Combined visible and near IR imaging capability is an increasingly important strategic requirement for commercial and military applications. Among the many materials used for imaging systems that operate in the near infrared (eg HgCdTe, Ge, InSb, PtSi, etc.), the InGaAs PIN photodiodes have been chosen because of their high performance and reliability (G Olsen, et al., "A 128X128 InGaAs detector array for 1.0-1.7 microns," in Proceedings SPIE, Vol 1341, 1990 pages 432-437).
    Near-IR imaging networks are normally hybrid devices in which the photodiodes are connected to silicon transistor integrated reading circuits (ROIC). In order to reduce the cost and simplify complex fabrication, an InGaAs / InP photodiode has been integrated into a junction field effect transistor (TEC) InP as a switching element for each pixel as described in US Pat. 6,005,266, Forrest et al. and integrated here by reference in its entirety. The combination of photodiode and FET on a single substrate has allowed for the formation of completely monolithic IR close-up focal plane arrays by reducing the cost of production and increasing performance. InP junction field effect transistors exhibited minimum leakage currents of 2 pA. In the associated work, it has been discovered that intentional doping of the GaAs PIN photodiode absorption layer reduces the dark current as described by US Patent No. 6,573,581, Sugg. et al. and integrated here by reference in its entirety.
    [0004] Progressive improvement of integrated integrated IR detection systems with compound semiconductors is necessary. SUMMARY [0005] A low-noise infrared photodetector can be formed without diffusion heat treatment. The photodetector may include a field effect transistor structure that includes a vertically integrated stack of photosensitive layers as well as PN junctions separated by a sufficient doping layer and a band gap to form a barrier layer for carrier migration. . The layers include a high sensitivity photodetecting layer, a charge sink layer, a transfer well layer, a charge transfer gate, and a drain electrode. In one embodiment, the photodetector layer and the charge well are InGaAs and the other layers are InP layers.
    BRIEF DESCRIPTION OF THE DRAWINGS
    Figure 1 is a simplified cross section of the IR detector of the invention.
    [0007] Figure 2 is a simplified cross section of an embodiment of the invention.
    Figure 3 is a simplified top view of the IR detector of the invention. DETAILED DESCRIPTION
    The present invention relates to a near IR photoconductive device which can be described as a field effect transistor (FET) with a buried source, an external gate and drain electrodes. By addressing the gate from an external source (such as from a ROIC pixel) the photocurrent collection can be mapped to specifically triggered events. Although the photodetector device of the present invention is based on InGaAs / InP material and device technology, the methods and other features discussed herein are not intended to be limited to this system of material alone and other materials. Compound III-V and Group II-VI compound semiconductors are included within the scope of the invention.
    [0010] A simplified cross section of an embodiment of the invention is shown in FIG. 1. The photoconductive field effect transistor (FET) 100 is a multilayer structure formed on a substrate 102. In this embodiment the substrate 102 comprises conductive InP which is typically a sulfur doped N + material. The doping level is sufficient for the N-type ohmic contacts and, as such, typically> 1E + 18. An N + InP buffer layer or a carrier migration stopping layer 104 is on an N + InP substrate 102. The N + InP buffer layer or the carrier migration stopping layer 104 is nominally defined as having a thickness sufficient to provide an epitaxial base for a high quality heterostructure. In the context of the present invention, the buffer layer or carrier migration stop layer 104 is also conductive, typically N-type doped using Si in epitaxial growth by organometallic vapor phase epitaxy / deposition. chemical vapor phase by organometallic compounds (OMVPE / MOCVD). In one embodiment, the carrier migration stopping layer 104 may be InAlAs or InAlGaAsP. An active collection layer 106 comprises undoped N-InGaAs of sufficient thickness to allow complete absorption of the photon radiation in the wavelength band in question. In one embodiment, the active collection layer 106 may be InAlGaAsP. The P + InGaAs sink layer 108 is deposited on the InGaAs collection layer 106 and acts as part of a collection well for photogenerated carriers formed in the active collection layer 106. The P + layer InGaAs 108 forms the charge well. In one embodiment, the charge well layer 108 may be InGaAsP. Layer 110 is a carrier migration stopping layer formed by undoped N-quaternary layers comprising an InAlAsP material system with a stepped composition gradient to maintain a continuity of network constants and to enable a supply of scaled energy to match the valence band shift on the heterojunction of the layers 106 to 110. It is also proposed that the layer 110 be made of a continuous gradient composition, so that the edge of the energy band is progressive. rather than staggered. It should also be noted in at least one construction of the invention that the layer 110 is made of a ternary compound, InAlAs, with an ability to form an upper band gap isolator and treatment to form a electric barrier. In such a construction, the thickness is designed to regulate the threshold potential on such a barrier. Layer 112 is an N + InP blocking layer (or blanket) having a thickness sufficient for the effective passivation of the lower band gap layers and all quaternary layers 110 against oxidative effects during processing or storage.
    The transfer gate 114 is a metal contact on the N + InP cover layer 112 or may also be exposed on the layer 110 to provide a bias potential on one or all of the layers 110 and 112. The design the device determines which layer is contacted and, once formed, does not change with respect to its given layout. The transfer gate 114 forms an ohmic junction with the layers 112 and 110. The structure 116 on the cover layer 112 comprises a P + InP transfer well which is formed by conventional processes for the formation of PN junctions in materials. Group III-V. Training choices include ion implantation, diffusion, or formation of homojunction developed by epitaxial growth. The transfer well 116 may be a continuous layer on initial crystal growth, and may be etched to form the distinct contact as shown in Fig. 1. The metal contact 118 on the transfer well 116 is the drain. The drain contact material comprises characteristic contact metals for P contacts on Group III-V materials, these materials include, but are not limited to, Pt, Ti, Ni and T Au.
    Finally, the dielectric polyimide encapsulation layer 120 covers the photoconductive mesa FET 100.
    It should be noted in Figure 1 that the walls are inclined to maximize the volume of the source active material. Another embodiment is shown in FIG. 2 in which each photoconductive field effect transistor layer 100 is numbered as in FIG. 1 but the walls are square and not inclined.
    A view from above of the structure 100 is shown in FIG. 3 as an individual pixel with identical characteristics numbered as in FIG. 1.
    STUDY OF POSSIBLE EMBODIMENTS
    The following descriptions are non-exclusive of the possible embodiments of the present invention.
    [0016] A low-noise infrared photodetector formed without a thermal diffusion process having a vertically integrated epitaxial field effect transistor (FET) structure may comprise: a high sensitivity photodetector layer; a load shaft; a transfer well; a charge transfer gate and a gate electrode; and a drain electrode.
    The structure of the preceding paragraph may optionally comprise, in addition and / or alternatively, one or more of the following additional elements, features and / or configurations: [0018] The photodetector layer and the charge well may be buried between Carrier migration stop layers.
    The photodetector layer may be TInGaAs, or an element of the InAlGaAsP material system traditionally developed on InP substrates.
    The photodetector layer may be TInGaAs.
    The carrier migration stop layers can be selected from the group consisting of InP, InAlAs and InAlGaAsP layers.
    The carrier migration stop layers may be InP.
    Carrier migration stopping layers may comprise layers of the heterostructure in the InAlGaAsP material system with a concentration gradient comprising a stepwise or continuous change in concentration on the layers.
    The charge well may be InGaAs or an element of the InAlGaAsP material system traditionally developed on InP substrates.
    The layers of the heterostructure may comprise binary, ternary or quaternary compositions of the InAlGaAsP material system.
    The charge transfer gate electrode and the drain electrode may comprise Ti, R, Au, Ni, Cu, or combinations thereof.
    The photodetector layer may be sensitive to a signal having a wavelength of between 0.4 and 1.7 micrometers.
    The charged transfer gate may be triggered by an external circuit which controls the collection of photocurrent.
    A low-noise infrared focal plane detector array having vertically integrated epitaxial field effect transistor (FET) structures, each FET structure comprising: a high sensitivity photodetecting layer; a load shaft; a transfer well; a charged transfer gate and a gate electrode; and a drain electrode.
    The structure of the preceding paragraph may optionally comprise, in addition and / or alternatively, one or more of the following additional elements, features and / or configurations: [0031] The photodetector and the charge pit may be buried between layers stopping migration of carriers.
    The photodetector layer may be InGaAs or an element of the InAlGaAsP material system traditionally developed on InP substrates.
    The carrier migration stop layers may be selected from the group consisting of InP, InAlAs and InAlGaAsP layers.
    The charge well may be InGaAs or an element of the InAlGaAsP material system traditionally developed on InP substrates.
    The layers of the heterostructure may comprise binary, ternary or quaternary compositions of the InAlGaAsP material system.
    The charge transfer gate electrode and the drain electrode may comprise Ti, Pt, Au, Ni, Cu or combinations thereof.
    A near IR camera system having a focal plane detector array with low noise IR close photodetector elements formed without a thermal diffusion process having a vertically integrated epitaxial field effect transistor (FET) structure may comprise: a photodetector layer with high sensitivity; a load shaft; a transfer well; a charged transfer gate and a gate electrode; and a drain electrode.
    The structure of the preceding paragraph may optionally include, in addition and / or alternatively, one or more of the following additional elements, features and / or configurations: The photodetector layer and the charge well may be buried between Carrier migration stop layers.
    Although the invention has been described with reference to the exemplary embodiment (s), those skilled in the art will understand that several changes can be made and that equivalents can replace elements of the present invention. without departing from the scope of the invention. In addition, several modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the essential scope of the present invention. Therefore, it is intended that the invention is not limited to the particular embodiment (s) described, but that the invention will include all embodiments within the scope of the appended claims.
    权利要求:
    Claims (12)
    [1]
    A low-noise infrared photodetector formed without a thermal diffusion process having a vertically integrated epitaxial field effect transistor (FET) structure comprising: a high sensitivity photodetecting layer; a load shaft; a transfer well; a charge transfer gate electrode; and a drain electrode, wherein the photodetector layer and the charge sink are buried between carrier migration stopping layers, wherein the carrier migration stopping layers are selected from the group consisting of InP, InAlAs and InAlGaAsP, wherein the carrier migration stop layers have a thickness so as to regulate the threshold potential across the carrier migration stop phases.
    [2]
    The photodetector according to claim 1, wherein the high sensitivity photodetecting layer is InGaAs, or a system element of InAlGaAsP material traditionally grown on InP substrates.
    [3]
    The photodetector according to claim 2, wherein the high sensitivity photodetecting layer is InGaAs.
    [4]
    The photodetector of claim 1, wherein the carrier migration stopping layers are InP.
    [5]
    The photodetector according to claim 1, wherein the carrier migration stopping layers comprise layers of the heterostructure in the system of an InAlGaAsP material with a concentration gradient comprising a staged or continuous change of the concentration on the layers.
    [6]
    The photodetector of claim 1, wherein the charge well is InGaAs or an element of the InAlGaAsP material system traditionally grown on InP substrates. * ·
    [7]
    The photodetector according to claim 5, wherein the layers of the heterostructure comprise binary, ternary or quaternary compositions of the InAlGaAsP material system.
    [8]
    The photodetector according to claim 1, wherein the charge transfer gate electrode and the drain electrode comprise Ti, Pt, Au, Ni, Cu or combinations thereof.
    [9]
    The photodetector according to claim 1, wherein the high sensitivity photodetecting layer is responsive to a signal having a wavelength of 0.4 to 1.7 micrometers.
    [10]
    The photodetector according to claim 1, wherein the charge transfer gate electrode is triggered by an external circuit which controls photocurrent collection.
    [11]
    A low-noise infrared focal plane detector array having vertically integrated epitaxial field effect transistor (FET) structures, each FET structure comprising: a high sensitivity photodetecting layer; a load shaft; a transfer well; a charge transfer .gall electrode .; and a drain electrode in which the photodetector layer and the sink are buried between carrier migration stopping layers, wherein the carrier migration stopping layers are selected from the group consisting of InP layers. , inAlAs and inAlGaAsP, wherein the carrier migration stopping layers have a thickness so as to regulate the threshold potential on the carrier migration stopping layers.
    [12]
    The array of detectors according to claim 13, wherein the high sensitivity photodetecting layer is InGaAs, or a system element of InAlGaAsP material traditionally grown on InP substrates.
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    法律状态:
    优先权:
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